<?xml version="1.0" encoding="UTF-8"?><rss version="2.0"
	xmlns:content="http://purl.org/rss/1.0/modules/content/"
	xmlns:dc="http://purl.org/dc/elements/1.1/"
	xmlns:atom="http://www.w3.org/2005/Atom"
	xmlns:sy="http://purl.org/rss/1.0/modules/syndication/"
	xmlns:georss="http://www.georss.org/georss" xmlns:geo="http://www.w3.org/2003/01/geo/wgs84_pos#" xmlns:media="http://search.yahoo.com/mrss/"
		>
<channel>
	<title>Comments on: TPM hardware attacks (part 2)</title>
	<atom:link href="http://rdist.root.org/2007/07/17/tpm-hardware-attacks-part-2/feed/" rel="self" type="application/rss+xml" />
	<link>http://rdist.root.org/2007/07/17/tpm-hardware-attacks-part-2/</link>
	<description>Embedded security, crypto, software protection</description>
	<lastBuildDate>Mon, 08 Mar 2010 21:19:29 +0000</lastBuildDate>
	<generator>http://wordpress.com/</generator>
	<sy:updatePeriod>hourly</sy:updatePeriod>
	<sy:updateFrequency>1</sy:updateFrequency>
		<item>
		<title>By: Nate Lawson</title>
		<link>http://rdist.root.org/2007/07/17/tpm-hardware-attacks-part-2/#comment-4274</link>
		<dc:creator>Nate Lawson</dc:creator>
		<pubDate>Sat, 05 Jan 2008 01:00:46 +0000</pubDate>
		<guid isPermaLink="false">http://rdist.root.org/2007/07/17/tpm-hardware-attacks-part-2/#comment-4274</guid>
		<description>Martin, great comments.  I agree the TPM is already destined for the chipset.  It also appears dynamic launching of a compartment (SENTER/SKINIT) will be the preferred method versus doing it at boot time.

This system of separate components all loosely connected still seems fundamentally flawed.  It&#039;s similar to the &quot;link encryption&quot; approach of trying to do hop-by-hop encryption of audio/video between media components.  By building it into the existing PC architecture, it also requires much more complicated software.  For example, each compartment will be running a kernel instance, probably Linux.  So that adds to the compartment setup/teardown time.

I think the purposes of DRM and intrusion resistance should and will be separated.  Graphics chips will have their own decryption/decoding logic so that video will be completely processed there.  Compartments could then be simplified and the TPM eliminated.

I&#039;m certain DRM will evolve this way.  The only question is whether the extraneous features of trusted computing are left in or are deprecated once the DRM use case is eliminated.</description>
		<content:encoded><![CDATA[<p>Martin, great comments.  I agree the TPM is already destined for the chipset.  It also appears dynamic launching of a compartment (SENTER/SKINIT) will be the preferred method versus doing it at boot time.</p>
<p>This system of separate components all loosely connected still seems fundamentally flawed.  It&#8217;s similar to the &#8220;link encryption&#8221; approach of trying to do hop-by-hop encryption of audio/video between media components.  By building it into the existing PC architecture, it also requires much more complicated software.  For example, each compartment will be running a kernel instance, probably Linux.  So that adds to the compartment setup/teardown time.</p>
<p>I think the purposes of DRM and intrusion resistance should and will be separated.  Graphics chips will have their own decryption/decoding logic so that video will be completely processed there.  Compartments could then be simplified and the TPM eliminated.</p>
<p>I&#8217;m certain DRM will evolve this way.  The only question is whether the extraneous features of trusted computing are left in or are deprecated once the DRM use case is eliminated.</p>
]]></content:encoded>
	</item>
	<item>
		<title>By: Martin Hansen</title>
		<link>http://rdist.root.org/2007/07/17/tpm-hardware-attacks-part-2/#comment-4267</link>
		<dc:creator>Martin Hansen</dc:creator>
		<pubDate>Fri, 04 Jan 2008 12:44:48 +0000</pubDate>
		<guid isPermaLink="false">http://rdist.root.org/2007/07/17/tpm-hardware-attacks-part-2/#comment-4267</guid>
		<description>The problem is that there&#039;s no way the CPU, the chipset and the TPM authenticate with each other. This is probably because they are made by different manufacturers and how are you going to exchange certificates, what if a new manufacturer arrives etc. I think the solution is to move the TPM into the chipset. That would make it much harder to make these attacks. The problem is that you would then have to deprecate/reject all the stand-alone TPM&#039;s that have already been sold. But of course that would happen automatically as time went by.

People here are very critical about remote attestation, saying it will be unmanageable. The problem is that most people are talking about TPM 1.1 remote attestation. I agree that would be unmanageable for most applications, particularly DRM on regular PC&#039;s. How in the world are movie studios going to have a list of hashes of all trusted device drivers (even mouse drivers etc.) that run in ring 0. That would be required for RA to work. This was acknowledged sometimes during the development of 1.1 and TPM 1.2 can be seen as an &quot;admission&quot; of this.  In TPM 1.2 you can start a secure session within an untrusted context. You only need to &quot;trust&quot; the images loaded in the secure context - not the o/s loading the context. A movie company could insist on you using a special signed secure context for watching your movies, and they could verify that you are using it etc. In practice I think we will have one core open-source root (maybe written by Intel/AMD) that can then load and authenticate agents for the particular application and provide separate storage for these agents. Hence, the movie company would only have to verify the root and their agent.

All decryption etc. for watching movies could be done in this secure context with memory curtaining etc. I think this would be feasible. Interestingly, TPM 1.2 spec could be much simpler than it is. In the context just described the chip is only used for authenticating the CPU image, establishing a session with the trusted root and for delivering the grant master key used to unlock the &quot;trusted-context-only&quot; secrets which may be stored in a file in the harddrive. There probably should be more than 1 grant master key so you can have multiple trusted roots etc. A few commands that could be described in 10 pages. It would definitely be feasible to integrate this system in the chipset or even the CPU itself. Oh well, now we&#039;re stuck with the umpteen pages TPM spec.

This is related to the lack of symmetrical encryption mentioned: There&#039;s no reason for having sym. enc. in the chip in the context of 1.2. The chip is only used for one authentication and basic key storage. Especially with SENTER/SKINIT all the chip has to do is to be the giant gatekeeper ensuring only trusted roots can get access to the keys (and the trusted root then has the responsibility of ensuring only trusted agents running in the trusted root context gets the keys they are allowed to etc.). Then these agents can do all the encryption they need on the regular CPU in a secure fashion (unless the system is broken via a hardware attack like memory snooping etc. I suspect that would be a quite difficult attack to carry out with ultra-fast memory etc.).</description>
		<content:encoded><![CDATA[<p>The problem is that there&#8217;s no way the CPU, the chipset and the TPM authenticate with each other. This is probably because they are made by different manufacturers and how are you going to exchange certificates, what if a new manufacturer arrives etc. I think the solution is to move the TPM into the chipset. That would make it much harder to make these attacks. The problem is that you would then have to deprecate/reject all the stand-alone TPM&#8217;s that have already been sold. But of course that would happen automatically as time went by.</p>
<p>People here are very critical about remote attestation, saying it will be unmanageable. The problem is that most people are talking about TPM 1.1 remote attestation. I agree that would be unmanageable for most applications, particularly DRM on regular PC&#8217;s. How in the world are movie studios going to have a list of hashes of all trusted device drivers (even mouse drivers etc.) that run in ring 0. That would be required for RA to work. This was acknowledged sometimes during the development of 1.1 and TPM 1.2 can be seen as an &#8220;admission&#8221; of this.  In TPM 1.2 you can start a secure session within an untrusted context. You only need to &#8220;trust&#8221; the images loaded in the secure context &#8211; not the o/s loading the context. A movie company could insist on you using a special signed secure context for watching your movies, and they could verify that you are using it etc. In practice I think we will have one core open-source root (maybe written by Intel/AMD) that can then load and authenticate agents for the particular application and provide separate storage for these agents. Hence, the movie company would only have to verify the root and their agent.</p>
<p>All decryption etc. for watching movies could be done in this secure context with memory curtaining etc. I think this would be feasible. Interestingly, TPM 1.2 spec could be much simpler than it is. In the context just described the chip is only used for authenticating the CPU image, establishing a session with the trusted root and for delivering the grant master key used to unlock the &#8220;trusted-context-only&#8221; secrets which may be stored in a file in the harddrive. There probably should be more than 1 grant master key so you can have multiple trusted roots etc. A few commands that could be described in 10 pages. It would definitely be feasible to integrate this system in the chipset or even the CPU itself. Oh well, now we&#8217;re stuck with the umpteen pages TPM spec.</p>
<p>This is related to the lack of symmetrical encryption mentioned: There&#8217;s no reason for having sym. enc. in the chip in the context of 1.2. The chip is only used for one authentication and basic key storage. Especially with SENTER/SKINIT all the chip has to do is to be the giant gatekeeper ensuring only trusted roots can get access to the keys (and the trusted root then has the responsibility of ensuring only trusted agents running in the trusted root context gets the keys they are allowed to etc.). Then these agents can do all the encryption they need on the regular CPU in a secure fashion (unless the system is broken via a hardware attack like memory snooping etc. I suspect that would be a quite difficult attack to carry out with ultra-fast memory etc.).</p>
]]></content:encoded>
	</item>
	<item>
		<title>By: Nate Lawson</title>
		<link>http://rdist.root.org/2007/07/17/tpm-hardware-attacks-part-2/#comment-2432</link>
		<dc:creator>Nate Lawson</dc:creator>
		<pubDate>Sat, 28 Jul 2007 18:49:20 +0000</pubDate>
		<guid isPermaLink="false">http://rdist.root.org/2007/07/17/tpm-hardware-attacks-part-2/#comment-2432</guid>
		<description>Thanks for the correction.  I &lt;a href=&quot;http://www.overclock3d.net/news.php?/cpu_mainboard/intel_eaglelake_chipset/1&quot; rel=&quot;nofollow&quot;&gt;looked up&lt;/a&gt; that chipset since I hadn&#039;t heard of it.  Pretty amazing stuff -- HDMI onboard, including keys; TXT + TPM to give you a hardware protected path to outputs.  It will be very interesting to see if this results in more set-top boxes designed using Intel (really uncommon today) or if it&#039;s used as a way to deprecate software-only playback of HD video on PCs.</description>
		<content:encoded><![CDATA[<p>Thanks for the correction.  I <a href="http://www.overclock3d.net/news.php?/cpu_mainboard/intel_eaglelake_chipset/1" rel="nofollow">looked up</a> that chipset since I hadn&#8217;t heard of it.  Pretty amazing stuff &#8212; HDMI onboard, including keys; TXT + TPM to give you a hardware protected path to outputs.  It will be very interesting to see if this results in more set-top boxes designed using Intel (really uncommon today) or if it&#8217;s used as a way to deprecate software-only playback of HD video on PCs.</p>
]]></content:encoded>
	</item>
	<item>
		<title>By: Sébastien Mouren</title>
		<link>http://rdist.root.org/2007/07/17/tpm-hardware-attacks-part-2/#comment-2423</link>
		<dc:creator>Sébastien Mouren</dc:creator>
		<pubDate>Fri, 27 Jul 2007 21:13:44 +0000</pubDate>
		<guid isPermaLink="false">http://rdist.root.org/2007/07/17/tpm-hardware-attacks-part-2/#comment-2423</guid>
		<description>Nate: Intel AMT is effectively a management technology. But what I said as nothing to do with it: Intel announced recently the next performance and mainstream desktop chipset refresh (codenamed EagleLake) will bring integrated TPM compatible with the 1.2 spec.</description>
		<content:encoded><![CDATA[<p>Nate: Intel AMT is effectively a management technology. But what I said as nothing to do with it: Intel announced recently the next performance and mainstream desktop chipset refresh (codenamed EagleLake) will bring integrated TPM compatible with the 1.2 spec.</p>
]]></content:encoded>
	</item>
	<item>
		<title>By: Nate Lawson</title>
		<link>http://rdist.root.org/2007/07/17/tpm-hardware-attacks-part-2/#comment-2399</link>
		<dc:creator>Nate Lawson</dc:creator>
		<pubDate>Tue, 24 Jul 2007 22:57:49 +0000</pubDate>
		<guid isPermaLink="false">http://rdist.root.org/2007/07/17/tpm-hardware-attacks-part-2/#comment-2399</guid>
		<description>Sebastien, if that&#039;s the feature I think it is (Active Management Technology, AMT), I believe it&#039;s a lights-out management co-processor, not a TPM.</description>
		<content:encoded><![CDATA[<p>Sebastien, if that&#8217;s the feature I think it is (Active Management Technology, AMT), I believe it&#8217;s a lights-out management co-processor, not a TPM.</p>
]]></content:encoded>
	</item>
	<item>
		<title>By: Sebastien Mouren</title>
		<link>http://rdist.root.org/2007/07/17/tpm-hardware-attacks-part-2/#comment-2390</link>
		<dc:creator>Sebastien Mouren</dc:creator>
		<pubDate>Mon, 23 Jul 2007 20:50:32 +0000</pubDate>
		<guid isPermaLink="false">http://rdist.root.org/2007/07/17/tpm-hardware-attacks-part-2/#comment-2390</guid>
		<description>Intel Q2&#039;08 performance and mainstream desktop chipsets will support an integrated TPM following the spec version 1.2.
Implementation details are unknow.</description>
		<content:encoded><![CDATA[<p>Intel Q2&#8242;08 performance and mainstream desktop chipsets will support an integrated TPM following the spec version 1.2.<br />
Implementation details are unknow.</p>
]]></content:encoded>
	</item>
</channel>
</rss>
